1. Field of the Invention
The invention relates to a method, apparatus and article of manufacture for semiconductor processing.
2. Background of the Invention
Advancements in semiconductor manufacture have led to increases in the density and miniaturization of microelectronic devices. In general, as the integration of semiconductor devices such as a dynamic random access memory (DRAM) increases, the area available for the capacitor becomes more limited.
In order to obtain capacitors having a capacitance suitably large enough for a highly integrated device, new materials and structures for capacitors are being sought. One common capacitor structure includes a metal (M), insulator (I), silicon (S) stack, known as MIS, where the metal is a top electrode and the silicon is a bottom electrode. A typical insulator is Ta2O5 because of its high dielectric constant. More recently, capacitor stacks comprise metal (M), insulator (I) and metal (M) layers. Such a scheme is known as an MIM stack wherein both electrodes are metals.
One problem with using a metal as the bottom electrode is the potential for its oxidation during its fabrication. It is believed that oxidation of the bottom electrode occurs during deposition of an oxygen-containing material such as Ta2O5 and/or during an annealing step such as the annealing of Ta2O5. Oxidation of the bottom electrode changes the electrical properties of the capacitor and inhibits the ability of the capacitor to function properly. In particular, the dielectric constant of the insulator may be decreased, thereby detrimentally affecting the capacitance of the capacitor. The change in the dielectric constant of the insulator is believed to be due to migration of oxygen from the insulator to the metal electrode. The detrimental effects of oxidation of one or both of the electrodes can be quantified by the resulting high leakage currents and low breakdown voltages of the capacitors.
Therefore, there is a need for an improved capacitor structure and method for producing the same.
The present invention generally relates to a semiconductor device, and more particularly, to a capacitor structure of a semiconductor device and a method of manufacturing the same, which has a suitable capacitance for use in an integrated device.
According to one aspect of the invention, a semiconductor device comprises a bottom metal layer, an insulating layer, a top metal layer and conducting oxygen-containing layers at the interfaces of the metal layers and the insulating layer. In one embodiment, the top and bottom electrodes are made of ruthenium and the conducting oxygen-containing layer is ruthenium oxide.
In another aspect of the invention, a method for forming a device on a substrate is provided. In one embodiment, the method comprises forming a first metal layer on the substrate; forming a first conducting oxygen-containing layer on the first metal layer; forming an insulator on the first conducting oxygen-containing layer; forming a second conducting oxygen-containing layer on the insulator and forming a second metal layer on the second conducting oxygen-containing layer. In another embodiment the method comprises depositing a first ruthenium layer on a substrate; heating the substrate; contacting the first ruthenium layer with an oxygen-containing gas; depositing an insulating material thereafter; depositing a second ruthenium layer on the insulating material, contacting the second ruthenium layer with an oxygen-containing gas and then depositing a third metal layer.